Detalhes do emprego
Responsibilities • Work with designverification andother stakeholders to come up with detailed testplans,dependencies, and deliverables. • Plantheverification of security design blocks by fully understandingthedesign specification, security requirements, and interactingwitharchitecture and design engineers to identifyimportantverification scenarios. • Work closelywithArchitecture, software, Security-assurance, design, andbackendimplementation stakeholders to make technicaldecisions.• Create and enhanceconstrained-random verificationenvironments using System Verilogand UVM. • Be the primarypoint of contact forfunctional verification of the IP forcross-functionalteams.
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