Graduate Talent (SOC DFT Verification)
Detalhes do emprego
Electrical/Electronic Engineering (Engineering) Full time Curious to know how Intel designers enable test or debug capability on our chip? Join us for an exciting career in Malaysia Design Center Chipsets Design Team as a SoC DFT Verification Graduate Talent. In this position, you will have the opportunity:
- To design, develop and validate the Chipsets and SoC IPs for Intel's latest product, focusing on DFT and Debug.
- To be trained and gain exposure to perform SoC design work such as RTL logic design in System Verilog, Verilog or other Hardware description languages.
- To perform validation of the Design for Testability (DFT) or Debugability (DFD) functionality of new architectural features of next generation designs by developing test plans, test content, coverage points, or test tools.
- To collaborate with stakeholders such as Structural Design, SoC RTL, Architecture/Microarchitecture, IP Design, Post-Silicon Manufacturing and other teams to enable Intel products.
- Familiarity with UNIX, and well-versed in Verilog or C Programming.
- Knowledge in RTL integration and validation methodologies.
- Strong analytical and debug skills.
- Ability to communicate well with counterparts and key stakeholders including cross-site partners.
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