Senior Staff Physical Verification Engineer
Job details
Senior Staff Physical Verification Engineer Bangalore /Hyderabad Founded by highly respected Silicon Valley veterans - with its design centers established in Santa Clara and Hyderabad .Opening Shortly in Bangalore Candidate should individually own and close physical verification DRC/LVS at ICC2/innovus level and Signoff physical verification DRC/LVS/ANT for different nodes in ICV/calibre across different foundries. Expert user of Mentor(Siemens) calibre tools and setting up of the signoff FLOWS for calibre/ICV DRC/LVS/ANT across different nodes. PV CAD expertise is good to have. Physical verification closure (DRC/LVS/ANT and other PV checks ) on advanced tech nodes like 7nm,5nm,4nm on different foundries like TSMC,INTEL ,GF and Samsung. Experience in handling block level physical verification closure both at ICC2 level and at Signoff PV level. Setting up the PERC flow for advanced nodes and debugging and coming up with solutions to fix PERC issues. Must have skill. Experience in handling bump routing ,bump DRCs and bump PV checks. Good to have bump assignment/planning skills. Must have skill. Expert user in creating special routes for signals, PG , clock. Must have skill. Must to have manual DRC fixing skills across different partitions and full chip in ICC2/Innovus/Calibre/ICV. Must to have some DRC fixing scripting skills within ICC/innovus environment. Candidate to own ,execute and fix multiple and deliver CLEAN signoff physical verification databases back to PNR . Candidate should have experience in full chip physical verification . Candidate with multiple tapeout experience preferred. Contact: Uday Mulya Technologies muday_bhaskar@yahoo.com "Mining The Knowledge Community"
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