Hardware Design Engineer

Job Title: LLM Hardware/Verilog Design Developer Location: Remote Contract Type: Full-time Contract to permanent (6–12 months, 8 hrs/day) Experience: 3–5 years Role Overview We are seeking a talented Hardware Design Developer to leverage hardware design platforms to generate training data for enhancing enterprise LLMs. This role offers an exciting opportunity to directly impact the efficiency and intelligence of enterprise-level AI systems. Key Responsibilities Develop, configure, and customize hardware design platforms to generate training data for LLMs. Collaborate with research teams to translate requirements into actionable insights. Ensure high-quality coding, debugging, and documentation for LLM training optimization. Identify and prioritize needs to improve LLMs' ability to automate complex processes. Requirements Education: BS or MS in Electrical Engineering or related field. Experience: 5+ years overall, with 2+ years in Hardware Design or Verification. Expertise in HDLs like Verilog, SystemVerilog, VHDL, or SystemC. Familiarity with Synopsys/Cadence or open-source toolchains. Experience in ASIC, VLSI, FPGA, or SoC design. Skills: Proficiency in scripting, front-end workflows, and verification. Strong problem-solving, communication, and collaboration skills. Preferred: Expertise in UVM, Formal Verification, Lint processes, and Assertion Coding (SVA). Knowledge of Computer Architecture, Assembly, and ML/AI systems. Application Process: If you meet the qualifications and are ready to advance your career, please submit your resume to be considered for this exciting opportunity. We look forward to hearing from you and exploring