Home India Senior Physical Design Engineer/Lead/Manager

Home India Senior Physical Design Engineer/Lead/Manager

Senior Physical Design Engineer/Lead/Manager

Full time at Adecco India in India
Posted on December 30, 2024

Job details

We have an urgent opening in Semiconductor service based company Role - Senior Physical Design and Senior Physical Design Manager Location : BangaloreMinimum Experienced - 6 Years Job Type : Full-TimePayroll : Direct PayrollCTC is open For Manager roles, a minimum of 8+ years of relevant PD experience is required. Job Summary :We are seeking a highly experienced and motivated Physical Design Lead and Physical Design Manager to lead our physical design team. The successful candidate will oversee the full physical design cycle, from synthesis to GDSII, for complex SoCs. This position requires deep expertise in physical design methodologies, hands-on experience in advanced process nodes (5nm, 7nm, or 10nm), and a strong leadership background to guide the team toward successful tape outs.Key Responsibilities :- Manage and execute takeout cycles for multiple chips.- Oversee and drive the complete Physical Design (PD) life-cycle, including floor planning, placement, and routing.- Handle the ECO (Engineering Change Order) life-cycle effectively.- Perform Clock-Tree Synthesis (CTS) and ensure optimal clock distribution.- Implement power-aware PD flows, including Automated Design Methodologies (ADM) and Place & Route (P&R).- Conduct Physical Design Static Timing Analysis (PD-STA) and develop timing constraints.- Achieve timing closure across multi-mode, multi-corner scenarios.Qualifications :- 6+ years of hands-on experience in Physical Design (PD) engineering.- Proven experience in managing takeout cycles for multiple chips.- Experience with advanced process nodes (5nm, 7nm, or 10nm) is highly desirable.- Strong expertise in the complete PD life-cycle, from floor planning to final sign-off.- Proficiency in ECO life-cycle management.- In-depth knowledge of Clock-Tree Synthesis (CTS) and power-aware PD flows.- Experience with PD-STA, timing constraint development, and achieving timing closure in multi-mode, multi-corner environments.- Familiarity with industry-standard tools and methodologies used in Physical Design. (ref:hirist.tech)

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