Mixed-Signal Digital Design (RTL) Engineer - Cork, Ireland
Full time
at Qualcomm
in
Online
Posted on December 21, 2024
Job details
Company:
QT Technologies Ireland LimitedJob Area:
Engineering Group, Engineering Group > ASICS Engineering General Summary: About The Role Qualcomm offers flexible work options tailored to our employee’s needs. These include a combination of work from home and working in our brand new, state of the art office in Penrose Dock, Cork. Well-being and life balance are fundamental to Qualcomm as an employer. We recognise and understand that employees have missed spending quality time with loved ones and extended family. As such, Cork Qualcomm policy allows our employees to blend short-term remote working with annual leave. Job Description Qualcomm Mixed-Signal IP (MSIP) Digital Design team is looking for experienced and talented digital design engineers to help design the next generation of high-performance and low-power mixed-signal IPs. The MSIP digital design team consists of architects, ASIC designers, protocol experts, digital signal processing engineers, and algorithm designers who are driving the definition and realization of IPs for the next generation of Qualcomm’s products targeted for mobile, compute, automotive, and AI applications. This role requires prior work experience in ASIC digital design flow, including micro-architecture definition, RTL coding, front-end implementation, as well as collaboration with DV and PD teams for verification and physical implementation of the design. Responsibilities:- Architecture, design, and implementation of digital sections of mixed-signal IPs (SerDes, DDR, PLL, DAC, ADC, Sensors, etc.)
- Apply computer architecture, digital signal processing (DSP), and optimization techniques for improving power, performance, and area (PPA) of IPs
- Run full suite of ASIC design tools (lint checking, CDC, DFT, synthesis, FV, STA, etc.) to validate and implement the design
- Work with design verification (DV) team to define test plans, verify the design, and fix bugs
- Work with physical design (PD) team for physical implementation of the design
- Create design specifications and documentation
- Work with the testing team for silicon bring-up and debug
- Master's degree in electrical engineering, Computer Engineering, or related field.
- 5+ years of experience in ASIC digital design, including micro-architecture and RTL design
- Experience working with various front-end ASIC tools such as Design Compiler, Fusion Compiler, Modelsim, VCS, Spyglass, and primetime.
- Excellent communication skills and ability to contribute strongly within a high-performance team
- Experience in low-power digital design
- Experience in computer architecture, digital signal processing, and algorithm design
- Experience in scripting languages (Python, Perl)
- Experience with at least one mixed-signal IP, such as SerDes (USB, PCIe, MIPI, UFS), DDR PHY, Timing circuitries (PLL, DLL, FLL), Data Converters (DAC, ADC), or sensors
- Salary, stock and performance-related bonus
- Maternity/Paternity Leave
- Employee stock purchase scheme
- Matching pension scheme
- Education Assistance
- Relocation and immigration support (if needed)
- Life, Medical, Income and Travel Insurance
- Subsidised memberships for physical and mental well-being
- Bicycle purchase scheme
- Employee run clubs, including running, football, chess, badminton + many more
- Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
- OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
- OR PhD in Science, Engineering, or related field.
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