Design Implementation engineer - Sr Lead/Staff

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware EngineeringGeneral Summary:Responsibilities:Full chip synthesis using Synopsys Design Compiler and Design Compiler-TopographicalConstraints development, Static Timing Analysis & timing closureWork closely with design team to come up with preplacement requirements & timing constraintsWork closely with physical design team for floorplan, placement & timing reviewsWork closely with cross-functional teams to review standard cell profile, timing models & memory modelsSkills/Experience:4 to 8 years of experience in digital designGood understanding of SoC ASIC design flowHands-on experience in full chip synthesis and static timing analysisProficiency with Synopsys DC & PT tools and Verilog/VHDL is a mustGood knowledge of IO interfaces like DDR, SDCC, HSIC, SPI is a mustKnowledge of ARM Processors, Ethernet MAC, PCIE and Bus protocols like AHB, AXI etc desirableExperience in Perl, TCL and shell scripting is desirableExcellent interpersonal & analytical skills with ability to work independentlyMinimum Qualifications:Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.ORMaster's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.ORPhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.Equal Opportunity Employer: Qualcomm is an equal opportunity employer and supports workforce diversity.

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