Memory Layout Design, Sr Engineer

Responsibilities:Collaborate with cross-functional teams to develop and implement layout designs for analog and mixed-signal (A&MS) integrated circuits.Create and optimize layout designs using industry-standard EDA tools.Perform physical verification and design rule checks to ensure design integrity and manufacturability.Participate in design reviews and provide feedback to improve design quality.Work closely with circuit designers to understand design specifications and constraints.Contribute to the development and enhancement of layout design methodologies and best practices.Stay updated with the latest industry trends and advancements in A&MS layout design.Required Skills:Bachelor's or Master's degree in Electrical Engineering or a related field.2+ years of experience in A&MS layout design for integrated circuits.Proficiency in industry-standard EDA tools, such as Cadence Virtuoso or Synopsys Custom Compiler.Exceptional knowledge of layout design methods, techniques, and methodologies.Experience with physical verification tools, such as Calibre or Assura.Understanding of semiconductor process technologies and their impact on layout design.Excellent problem-solving and systematic skills.Ability to work effectively in a team-oriented environment.Good communication and interpersonal skills. PRB