Power Management Validation Lead/Engineer
Job details
Job Details: Job Description: Intel’s Client Discrete Graphics PM (Power Management) team is responsible for all aspects of power management for its Client Discrete Graphics product line. Our activities include micro-architecture, firmware, hardware design, and pre-silicon verification. As part of the power management design verification team, you will work closely with the platform, system, and IP architects/micro-architects for defining and developing test strategy, test plan, develop the verification content, manage a team of engineers. This role will also involve verification execution, reporting progress to management. Qualifications:
- Bachelor/Masters in Electrical/Electronics/Computer Engineering
- 12+ Years of experience in pre-silicon verification across IP and SoC
- In-depth knowledge of Formulating verification strategy, verification/test plan, developing testbenches architecture and writing tests
- System Verilog and UVM and SV based coverage driven verification
- Any scripting language Perl/Python/Shell
- Industry standard RTL simulation e.g. Synopsys VCS
- Pre-silicon verification execution management and reporting metrics
- People management and verification execution
- Experience in power management validation at SoC level is a plus
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