IP Design Verification Engineer

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IP Design Verification Engineer

Apply locations Malaysia, Penang Malaysia, Kulim time type Full time posted on Posted Yesterday job requisition id JR0260001

Job Details:

Job Description: 

Come join our Chipsets Ingredients Team (CIT) which is part of the Chipsets Silicon Group (CSG).We are looking for a highly motivated logic/RTL pre-silicon verification engineer who will be responsible for the definition and implementation of clocking solution for client and server chipsets in cutting edge internal and external technology nodes. In this unique role the scope of learning opportunity, contributions and influence expands over on-die, multi-die and system level clocking solutions. As system level clocking protocols are the backbone of modern multi-die power management schemes, the role naturally expands into great exposure and contribution opportunities into low-power design architecture. Your responsibilities will include, but not be limited to one or more of the following aspects of the RTL verification flow which encompasses all aspects of logic design/verification methodology.

• Performs functional verification of IP logic to ensure design will meet specification requirements.
• Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to microarchitecture specifications.
• Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.
• Replicates, root causes, and debugs issues in the presilicon environment.
• Finds and implements corrective measures to resolve failing tests.
• Collaborates with architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features.
• Documents test plans and drives technical reviews of plans and proofs with design and architecture teams.
• Maintains and improves existing functional verification infrastructure and methodology.
• Participates in the definition of verification infrastructure and related TFMs needed for functional design verification.
• Behavioral traits we are looking for:
• Strong technical leadership with good communication, interpersonal and problem-solving skills
• Motivated, self-directed and able to work effectively both independently and as a team

Qualifications:

Minimum Bachelor's degree of Electronics and Electrical Engineering and 5 years relevant working experience.

Job Type:

Experienced Hire

Shift:

Shift 1 (Malaysia)

Primary Location: 

Malaysia, Penang

Additional Locations:

Malaysia, Kulim

Business group:

In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A Work Model for this Role This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.

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