Functional DV ( Clock/Power) Verification Staff Engineer

Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: Qualcomm Graphics HW team in Bangalore is responsible for developing and delivering GPU solutions which are setting the power and performance benchmark in the mobile computing industry. In this role of Graphics Verification Engineer, you will be verifying the Clock and power management module with design features for low power. The responsibilities will majorly include:

• Understanding of GPU power and clock domains with power-up/down sequences
• Own end to end DV tasks from coding Test bench and test cases, write assertions, debugging simulations and achieving all coverage goals
• Develop test plan to verify sequences and design components for Clock and power management modules.
• Explore innovative DV methodologies (formal and simulation) to continuously push the quality and efficiency of test benches

Successful candidate will be required to collaborate with worldwide design, silicon and architecture teams to achieve all project goals. Hence, we are looking for candidates with strong communication skills. Minimum Qualifications: • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Minimum Qualifications Minimum 8 -13 years of design verification experience. * Senior positions to be offered to candidates with proven expertise in the relevant field. Preferred Qualifications *3+ years industry experience with below skillset:

• Strong System Verilog/UVM based verification skills & experience with assertion & coverage-based verification methodology
• Experience in formal / static verification methodologies will be a plus
• Basic understanding of low power design techniques
• Good understanding of design components such as clock gates, level shifters, isolation cells and state retention cells.
• Experience with Synopsys NLP (native Low Power) tool.
• Experience with scripting languages such as Perl, Python is a plus.

Education Requirements BE/BTech/ME/MTech/MS Electrical Engineering and/or Electronics, VLSI from reputed university preferably with distinction. Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able to participate in the hiring process. To all Staffing and Recruiting Agencies: Our Careers Site is only for individuals seeking a job at Qualcomm. Staffing and recruiting agencies and individuals being represented by an agency are not authorized to use this site or to submit profiles, applications or resumes, and any such submissions will be considered unsolicited. Qualcomm does not accept unsolicited resumes or applications from agencies. Please do not forward resumes to our jobs alias, Qualcomm employees or any other company location. If you would like more information about this role, please contact Qualcomm Careers. #J-18808-Ljbffr