Head of Digital Design

دوام كامل في a Laimoon Verified Company في Netherlands
نُشرت يوم November 8, 2024

تفاصيل الوظيفة

Title: Head of Digital Design

Location: Delft, Netherlands

Flexibility: 3 to 4 days a week working from home

Company: Our client develops ultra-low power processors that mimic the brain's mechanisms for processing fast data streams from sensors, enabling complex sensor analytics functionalities. Additionally, these processors allow data to be processed faster and with up to 99.75% less energy than with traditional processors.

Job Responsibilities:

Defining, planning, scheduling, and executing the digital design roadmap of the next generation of SOC products.

Guiding the digital design team towards on-time/on-spec deliverables.

Working closely with the VP of engineering and a team of cross-discipline experts to forge high-level architecture.

Breaking down product features into macro and sometimes micro architecture decisions that will be distributed across the team.

Being in charge of designing complex digital blocks for the neuromorphic computing space. Full ownership is expected, from microarchitecture to design and verification steering.

Securing key performance metrics throughout the design cycle (power, throughput, robustness), and validates them into a verification strategy.

Identifying any IT blockage that can affect the schedule of the project.

Distilling team progress against schedule and mitigate risks ahead of time.

Leading the team by example - brings the team together, enables the team to find its way, brings clarity around objectives, priorities, expectations, deliverables, and timelines, and protects the team.

Requirements:

10+ years of digital design experience on complex architectures.

4+ years managing digital design teams.

Expertise in computer architecture and complex SOC systems.

Strong verification skills with impeccable reuse and best practices.

Ability to design from scratch complex digital modules, preferably in the area of hw accelerators, Computer Vision, DSP or Neural Networks. Power aware design and understanding of power domains.

Experience with various fast & slow communication protocols (SPI, I2C, MIPI, USB) and on-chip bus protocols (AMBA, OBI, NOC).

Interview Process:

Meeting with HR -> Technical interview with VP of Engineering -> Meet the team -> Offer

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