Opportunities for Design Verification-Senior Engineer/Lead/Manager -Ahmedabad/Bengaluru/Chennai

About Us: Eximietas Design is a leading technology firm specializing in (VLSI/Cloud Computing/Cyber Security/AI/ML) solutions. With a commitment to innovation and excellence, we empower businesses to thrive in the dynamic digital landscape. Our success is fueled by the expertise of our engineering leadership team, drawn from industry giants such as Google, Cisco, Microsoft, Oracle, Uber, Broadcom, and Sun.Job Overview: We are seeking an experienced Design Verification Engineer with a minimum 4 years of hands-on experience. As a key member of our team, you will play a pivotal role in ensuring the robustness and correctness of our cutting-edge System On Chip designs.Key Responsibilities:Hands on verification experience in SOC Design Verification/IP Verification/Sub System Verification/SV-UVM for complex projects, ensuring the successful execution of verification plans.Develop and implement comprehensive verification strategies, test plans, and test benches for high-speed SOCs, including low-speed peripherals like I2C/I3C, SPI, UART, GPIO, QSPI, and high-speed protocols like PCIe, UCIe, Ethernet, CXL, MIPI, DDR and HBMConduct Gate-level simulations, and power-aware verification using Xprop and UPF.Collaborate closely with cross-functional teams, architects, designers, and pre/post-silicon verification teams.Ensure verification signoff criteria are met and documentation is comprehensive.Experience with verification tools from Synopsys and Cadence, including VCS and Xsim.Integration of third-party VIPs (Verification IP) from Synopsys and Cadence.Minimum Qualifications:Bachelor's degree in Computer Science, Electrical/Electronics Engineering, or related field. ORMaster's degree in Computer Science, Electrical/Electronics Engineering, or related field.4+ years of hands-on experience in SOC Design Verification/IP Verification/Sub System Verification/SV-UVM for complex projects. PRB